The invention relates to a synchronization circuit for synchronizing self-oscillating PWM modulators, particularly for a driver circuit.
FIG. 1A shows a conventional circuit arrangement for producing a pulse-width-modulation signal based on the prior art. The PWM modulation signal is obtained using a comparator by comparing the signal to be modulated with a saw-tooth or triangular signal. FIG. 1B shows the production of a pulse-width-modulated signal through comparison of an analogue input signal with a triangular reference signal. Pulse-width-modulated signals can be amplified particularly efficiently. As FIG. 1A shows, the PWM signal produced is amplified by a power stage and is output at an output A.
As FIG. 2 reveals the amplified pulse-width-modulated signal is then filtered by an out-of-band filter in order to obtain the original analogue input signal and is supplied to an electrodynamic transducer or a loudspeaker, for example.
FIG. 3B shows the signal spectrum for a pulse-width-modulated signal which is produced using a pulse width modulator as shown in FIG. 3A. The pulse width modulator shown in FIG. 3A is the pulse width modulator already described in FIG. 1A, which provides a two-level amplified pulse-width-modulated output signal. As FIG. 3B reveals, the pulse-width-modulated signal produced has many spectral components which are situated around the switching frequency of the pulse width modulator. In order to meet the PSD masking demands of a signaling transmission standard, for example an ADSL standard, the downstream OOB filter A therefore needs to have a relatively steep filter curve in order to reconstruct the analogue signal in the PWM modulator shown in FIG. 3A, as shown in FIG. 3B.
Pulse width modulators of differential design have therefore been proposed, as are shown schematically in FIG. 3C. FIG. 3D shows the associated signal spectrum normalized to the switching frequency of the PWM modulator. As FIG. 3D reveals, the signal spectrum has no signal components in the range of the switching frequency. The downstream OOB filter B can therefore have a less steep filter edge, so that the circuit complexity for implementing the OOB filter is prevented. In practice, this results in the OOB filter's filter order being able to be reduced and the number of LC components being reduced.
FIGS. 4A, 4B, 4C are used to illustrate the problem on which the invention is based. A driver circuit of differential design, as shown in FIG. 4A, with two PWM modulators has a perturbing spectral increase, for example in the case of an ADSL signal in the range of a switching frequency of 10 MHz, if the two PWM modulators are not totally in sync with one another. If the two PWM modulators in the signal driver of differential design are not in sync, these spectral noise components can be filtered out only using a technically complex filter, i.e. using a high-order OOB filter. This increases the circuit complexity for the driver circuit.
To synchronize two self-oscillating PWM modulators, a paper from the University of Leuven, SOPA: “A High-Efficiency Line Driver in 0.35 μm CMOS using a Self-Oscillating Power Amplifier”, Proceedings of ISSCC 2001, has proposed the circuit arrangement based on the prior art which is shown in FIG. 5. The driver circuit of differential design which is shown in FIG. 5 contains two PWM modulators arranged in parallel which are supplied with an analogue input signal VIN. The PWM modulators are self-oscillating and have a comparator with a digital buffer which is fed back via a feedback filter to the comparator. The two PWM modulators are of totally analogue design. The feedback filter is designed such that the feedback loop is unstable or oscillates. The outputs of the two PWM modulators are coupled to one another via a capacitor CTANK and via the primary coil of a transformer. The coupling via the capacitor CTANK is strong particularly at higher frequencies, since the impedance of the capacitor moves towards zero at high frequencies. The output-side coupling for synchronization is made only indirectly in the case of the circuit arrangement shown in FIG. 5 and, in particular, is not sufficient to reject spectral components in the frequency range of the switching frequency of the PWM modulators to an adequate degree.
FIG. 6 shows another circuit arrangement based on the prior art which has been proposed in order to synchronize two PWM modulators to one another. The circuit arrangement shown in FIG. 6 is described in published international application for patent No. 2003055060 A1. The two PWM modulators 21A, B respectively have a signal input for applying an analogue input signal, with the PWM modulator A receiving the analogue input signal VIN inverted by an inverter and the PWM modulator B receiving the uninverted analogue input signal Vin. The two PWM modulators A, B are self-oscillating and have an input signal filter B1, B2 which filters a difference signal between the applied input signal and a feedback signal. The synchronization circuit is provided between the output of the input signal filter and the input of a comparator, which compares the difference signal with a reference voltage for producing a comparator output signal. The comparator output signal is amplified by a power stage and is fed back to the input signal filter via an analogue passive feedback filter A. As FIG. 6 reveals, synchronization in the case of the circuit arrangement based on the prior art takes place upstream of the comparator in the forward signal path of the PWM modulator, so that the proportion of nonlinearities in the PWM modulation increases as the coupling or synchronization of the PWM modulators increases.
In the case of the conventional circuit arrangement shown in FIG. 6, mismatches or synchronization errors can be compensated for up to approximately 0.1%. In the case of a greater error or in the case of a greater mismatch between the two PWM modulators, synchronization is not possible.